JWAC-1: Cache Replacement Championship
Program
Sunday, June 20, 2010

Time Title and Authors Paper Code Results Presentation
2:00 - 2:10 pm Welcome and Introduction
Aamer Jaleel (Intel), Organizing Committee Chair, and Joel Emer (Intel), Program Committee Chair 		pdf
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2:10 - 2:30 pm Dead Block Replacement and Bypass with a Sampling Predictor
D. Jimenez (University of Texas at San Antonio, USA) 		pdf tgz private ,
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2:30 - 2:50 pm Instruction-based Reuse Distance Prediction Replacement Policy
P. Petoumenos, G. Keramidas, and S. Kaxiras (University of Patras and Industrial Systems Institute, Greece) 		pdf tgz private ,
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2:50 - 3:10 pm CRC: Protected LRU Algorithm
Y. Peress, I. Finlayson, D. Tyson, and D. Whalley (Florida State University, USA) 		pdf tgz private ,
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3:10 - 3:30 pm SCORE: A Score-Based Memory Cache Replacement Policy
N. Duong, R. Cammarota, D. Zhao, T. Kim, and A. Veidenbaum (UC-Irvine, USA) 		pdf tgz private ,
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3:30 - 3:45 pm Break
3:45 - 4:05 pm A Dueling Segmented LRU Replacement Algorithm with Adaptive Bypassing
H. Gao and C. Wilkerson (Intel) 		pdf tgz private ,
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4:05 - 4:25 pm The 3P and 4P cache replacement policies
P. Michaud (INRIA, France) 		pdf tgz private ,
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4:25 - 4:45 pm Insertion Policy Selection Using Decision Tree Analysis
S. Khan and D. Jimenez (University of Texas at San Antonio, USA) 		pdf tgz private ,
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4:45 - 5:05 pm Adaptive Sub-Set Based Replacement Policy for High Performance Caching
L. He, Y. Sun, and C. Zhang (Inner Mongolia University, China)		 pdf tgz private ,
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5:05 - 5:25 pm Map-based Adaptive Insertion Policy
Y. Ishii, M. Inaba, and K. Hiraki (The University of Tokyo, Japan)		 pdf tgz private ,
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5:25 - 5:45 pm MadCache: A PC-aware Cache Insertion Policy
M. Hayenga, A. Nere, and M. Lipasti (University of Wisconsin, USA) 		pdf tgz private ,
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5:45 - 6:00 pm Awards and Closing Remarks
Aamer Jaleel, Organizing Committee Chair (Intel)
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